Graduate Design Engineer sought by ARM Inc. in Austin, TX to analyze design timing and power to help improve the quality of ARM IP. Min Req: Master's degree or foreign equiv. in Electr. Engr., Comp. Engr., or Comp. Sci. or rltd and knwl of synthesis and layout EDA tools, Unix, Perl/Tcl and VHDL/Verilog would be useful, VLSI design challenges seen at deep-submicron nodes,Processor micro-architecture design considerations at deep-submicron nodes, static timing analysis concepts & ECO's, and, VLSI low power techniques and power reduction strategies. Send resume to: email@example.com. Reference #2020.